TY  - BOOK
AU  - Wang Laung-Terng Ed.
AU  -  Wu Cheng-Wen Ed.
TI  - VLSI test principles  and architecture  design for testability
U1  - D651:81, P6 
PY  - 2006///
CY  - Amsterdam
PB  - Morgan Kaufmann      
KW  - VLSI
ER  -