000 00905nam a2200265Ia 4500
003 OSt
005 20220930093201.0
006 a|||||r|||| 00| 0
007 ta
008 220926b |||||||| |||| 00| 0 eng d
024 _a32078
037 _cTheses
040 _aCRL
_cCRL
_beng
041 _2eng
_aeng
100 _aSingh Urvashi Au.
_9551032
110 _aUniversity of Delhi. Faculty of Technology. Department of Electronics and communication engineering
245 0 _cSingh Urvashi Au.; Gupta Maneesha Gu.
_aAnalog intergrated circuit design employing different bandwidth extension techniques
260 _c2015
300 _axxii,209 p.
_ap.
_ccm.
650 _aTECHNOLOGY
700 _a Gupta Maneesha Gu.
_9551033
700 _aUniversity of Delhi. Faculty of Technology. Department of Electronics and communication engineering
942 _cDIS
_2CC
999 _c884949
_d884949